1. Field of the Invention
The present invention relates to a method of fabricating a semiconductor device and a semiconductor device fabricated by the method and, more particularly, to a semiconductor device capable of reducing electrical defects and a method of fabricating the semiconductor device.
2. Description of the Related Art
As integration of a semiconductor devices continues to be enhanced, the size of contact holes serving as connections between devices or layers decreases while the thickness of an interlayer insulating film increases. Therefore, as the aspect ratio of a contact hole increases, the alignment margin of a contact hole decreases during a photolithography process.
In particular, the margin narrows between a buried contact (BC) that is a storage node contact and a contact pad (DC pad) that is located below a Direct Contact (DC) connected to a bit line, that is, a bit line contact pad, thus increasing the likelihood of device failure due to shorting.